2021-07-21 03:38:56 <veltas      > Programming war crimes
2021-07-21 03:39:18 <siraben     > and then the Forth nation attacked
2021-07-21 03:39:28 <veltas      > 
ACTION chuckles

2021-07-21 06:22:54 <eris[m]1    > <siraben "eris: a war criminal because you"> yes
2021-07-21 14:44:49 <Zarutian_HTC> re logisim evolution: the 3.5.0 version does not have a dual ported RAM component
2021-07-21 14:46:35 <Zarutian_HTC> dual ported basically means that the component has two sets of address and data lines independent of each other but give access to the same memory cells
2021-07-21 14:47:58 <Zarutian_HTC> did not a big one so I made one as sub circuit that uses registers. One per memory cell
2021-07-21 19:26:34 <dave0       > maw
2021-07-21 23:05:05 <dave0       > re maw