2022-04-04 21:15:06 This has some interesting ideas in it, especially for Forth hardeware: 2022-04-04 21:15:09 https://www.youtube.com/watch?v=kSQ3BpPJEH4 2022-04-04 21:15:59 He introduces an idea where literals are built up in sections. This lets you have a one-byte wide instruction bus, but the data section can be any width. 2022-04-04 21:16:25 You build up literals however wide you need by a succession of literal bytes 2022-04-04 21:17:09 And I THINK where he's going here is that jump targets PRECEDE the jump opcode. I assume the target gets pushed to the stack, like any other literal, and then jump takes the target from the stack. 2022-04-04 21:17:32 It really does make the instruction stream flawlessly single-width, and all instructions are one instruction word wide. 2022-04-04 21:17:47 Interesting idea. 2022-04-04 21:18:25 Distant jumps would take longer than near jumps - it would take longer to build the literal. 2022-04-04 21:19:02 If an instruction word has the MSB set, all the rest of the bits are literal bits. If not, it's an instruction. 2022-04-04 21:24:26 I don't see that as terribly useful for a software implementation, but it looks like it could be quite interesting for a Forth processor. 2022-04-04 21:33:11 In his hardware work, the benefit that gave is that "jump value" is all one instruction - is a multicycle instruction, and required a longer period of not getting interrupted. Whereas "literal; jump" takes no more time (two cycles) but is two single cycle instructions, alloweing interrupts in between. 2022-04-04 21:34:15 I'm not quite sure yet how he distinguishes between a multi-component single literal and a string of separate literals.