2023-09-29 10:11:48 <KipIngram   > I think calling it an ISA isn't unreasonable.
2023-09-29 10:12:42 <KipIngram   > I wonder, though, if we would find a lot less standardization among GPUs than CPUs?  Which would necessitate a "driver layer" between the stuff you specify and the bits that actually control the hardware?
2023-09-29 10:12:56 <KipIngram   > That's a guess - maybe it's more standard than I think.
2023-09-29 10:13:40 <GeDaMo      > https://en.wikipedia.org/wiki/Standard_Portable_Intermediate_Representation
2023-09-29 10:14:42 <KipIngram   > Yeah, I was looking at SPIRV last night.
2023-09-29 10:14:57 <KipIngram   > Guessing that it might be the closest we can get.
2023-09-29 10:15:44 <KipIngram   > I haven't found a reference yet, though, that describes the relationship between SPIRV and the GPU hardware, the way a CPU instruction set description would be presented.  Seems to more describe the interface between SPIRV and various other software layers.
2023-09-29 10:16:10 <KipIngram   > I'm afraid the GPU itself still looks an awful lot like a black box to me.
2023-09-29 10:17:04 <KipIngram   > Know any links that describe typical GPUs in a "parallel computer architecture" way?
2023-09-29 10:17:43 <KipIngram   > I.e., how all the logic is actually laid out and interconnected?
2023-09-29 10:18:14 <KipIngram   > Ultimately it's a big digital circuit - surely there are descriptions in detail of that circuitry around somewhere.
2023-09-29 10:18:44 <GeDaMo      > It's a multicore CPU with different tradeoffs
2023-09-29 10:19:03 <GeDaMo      > Simpler cores (but more of them) with big vector units
2023-09-29 10:19:05 <KipIngram   > Yes.  Simpler processors but a lot more of them.
2023-09-29 10:19:12 <KipIngram   > :-)
2023-09-29 10:19:31 <KipIngram   > Is there an echo in here?  :-)
2023-09-29 10:19:39 <GeDaMo      > :P
2023-09-29 10:19:50 <KipIngram   > But... details.
2023-09-29 10:20:09 <KipIngram   > Like I said, maybe it varies vendor to vendor - I have no idea.
2023-09-29 10:20:39 <KipIngram   > Just because we can buy CPUs that behave "just alike" from Intel and AMD doesn't mean that's the case with GPUs too.
2023-09-29 10:22:29 <KipIngram   > I see this:
2023-09-29 10:22:31 <KipIngram   > https://core.vmware.com/resource/exploring-gpu-architecture#section1
2023-09-29 10:22:51 <KipIngram   > Pretty high level, though.
2023-09-29 10:23:35 <KipIngram   > https://download.nvidia.com/developer/cuda/seminar/TDCI_Arch.pdf
2023-09-29 10:23:56 <KipIngram   > Much better.
2023-09-29 10:24:07 <KipIngram   > That will keep me busy for a little while.
2023-09-29 10:25:35 <KipIngram   > It still doesn't get down to the level of "poke this information in via these registers to get this result" though.
2023-09-29 10:25:48 <KipIngram   > Which is what I would expect from an instruction set architecture.
2023-09-29 10:26:31 <KipIngram   > I'll put it this way.  For an x64 CPU, I can learn precisely what data I need to get into RAM, somehow, to get a particular behavior from the CPU.
2023-09-29 10:26:52 <KipIngram   > Granted, most of the time we need various tools to actually do that, but in principle at least it's specified down to that level.
2023-09-29 10:27:14 <KipIngram   > I'd like the same for the GPU.  Forget the tools - what data needs to be put where to elicit what behaviors?
2023-09-29 10:28:25 <KipIngram   > If I flip this particular bit, how will it change what happens?  Etc.  A "pure hardware" level description.
2023-09-29 10:28:38 <GeDaMo      > Maybe look at AMD's stuff
2023-09-29 10:29:00 <GeDaMo      > I believe they provide more information about their GPUs
2023-09-29 10:29:03 <KipIngram   > Yeah, I guess now I've got myself a little motivated - I'll dig around some this weekend.
2023-09-29 10:29:17 <KipIngram   > Wife's out of town visiting her sister - it'll give me something to do.
2023-09-29 10:33:57 <GeDaMo      > https://www.amd.com/en/search/documentation/hub.html#sortCriteria=%40amd_release_date%20descending&f-amd_product_type=Graphics
2023-09-29 10:38:40 <thrig       > Brian Kernighan wrote unix while his wife was away
2023-09-29 10:39:18 <GeDaMo      > Yeah, but to be fair that was something like three or four weeks :P
2023-09-29 10:46:58 <KipIngram   > Ah, that link is good.
2023-09-29 10:56:40 <KipIngram   > This is definitely the sort of info I was talking about:
2023-09-29 10:56:43 <KipIngram   > https://www.amd.com/content/dam/amd/en/documents/radeon-tech-docs/instruction-set-architectures/rdna2-shader-instruction-set-architecture.pdf
2023-09-29 12:04:21 <KipIngram   > Ugh.  The MAX32655 flash memory architecture is different from the sort of thing I'm familiar with from work.  I think it's a NOR flash, readable as though it's RAM and fully mapped into the processor's address space.
2023-09-29 12:04:34 <KipIngram   > 8kB pages, 128-bit words.
2023-09-29 12:04:45 <KipIngram   > I'm going to have to think a little about how to best use it.
2023-09-29 12:11:06 <KipIngram   > It's a 512kB flash, and is stated to have a life of 10k write cycles.  So that's around 5 GB of total lifetime writes, max.