2024-05-13 05:39:47 <KipIngram   > Yes, so that the very first item will adjust min and max to its own value, and then they'll spread out from there.
2024-05-13 13:35:15 <rendar      > does Risc-V has some Forth principles in its core?
2024-05-13 13:36:55 <MrMobius    > not sure what that means but if you mean whether it's similar to some of the forth processors like the ga144 then definitely not
2024-05-13 14:10:29 <rendar      > i see
2024-05-13 14:31:35 <veltas      > No it's just a readily available, open architecture with cheap, low power, low transistor count options
2024-05-13 15:17:12 <KipIngram   > Risc-V instruction set is organized into "sets" - there's a base level which a compliant device must support, and then additional features are optional.  So you can target a processor to your specific application and still remain "under the Risc-V umbrella."
2024-05-13 18:19:12 <KipIngram   > It's very much a register-oriented architecture, so in that sense at least it's not particularly "Forth oriented."
2024-05-13 18:19:24 <KipIngram   > I.e., it's not a "stack machine."
2024-05-13 20:18:29 <dlowe       > There's an idea for your forth programs. Just define a bunch of variables d1 d2 d3 d4 d5 and start using them to return all your word values
2024-05-13 20:18:55 <MrMobius    > rendar: there is Mecrisp-Quintus if you want a RISC-V forth
2024-05-13 20:20:00 <dlowe       > you could even start defining words like d1+d2->d3 - it'd be great
2024-05-13 22:31:22 <rendar      > MrMobius, wow thanks
2024-05-13 23:03:25 <KipIngram   > dlowe: Chuck had a whole section in his book "Programming a Problem-Oriented Language" on how you could implement infix arithmetic in Forth.  It was early days, and he seemed sensitive about things people might criticize, like lack of infix.
2024-05-13 23:03:42 <KipIngram   > Later on he didn't care.  His attitude became "Forth's way is better."