2025-06-23 20:44:42 <lf94        > tabemann: it feels so wrong to have to do 16 + but not for the NVIC set
2025-06-23 20:44:44 <lf94        >   ['] gpio-edge-high-low-handler IO_IRQ_BANK0 16 + vector!
2025-06-23 20:44:46 <lf94        >   IO_IRQ_BANK0 NVIC_ISER_SETENA!
2025-06-23 20:44:55 <lf94        > Why is this again?